RDIMM chipset boosts server memory bandwidth

The Rambus DDR5 9600 server RDIMM chipset supports DDR5 RDIMMs operating at up to 9600 MT/s in CPU-based server platforms. The chipset is built around the RCD06 sixth-generation registering clock driver, which increases bandwidth by 20% over the previous generation. As a key control-plane chip, the registering clock driver distributes command/address, chip-select, and clock signals to the DRAM devices on the RDIMM.

In addition to the RCD06, the chipset includes the PMIC5030 power management IC and a serial presence detect (SPD) hub with an integrated temperature sensor. The SPD hub communicates via the I3C bus for system configuration and thermal management. Two dedicated temperature sensors per DIMM provide precision thermal sensing and, in combination with the SPD hub, enable three points of thermal telemetry for the memory module.

By integrating clocking, control, and power management functions, the chipset helps ensure signal and power integrity at high data rates while simplifying the design of DDR5 RDIMMs. This level of integration becomes increasingly important as server architectures scale to support higher processor core counts, larger memory capacities, and the sustained demands of continuously running AI workloads.

Learn more about the DDR5 9600 Server RDIMM chipset here.

Rambus

The post RDIMM chipset boosts server memory bandwidth appeared first on EDN.