Introduction

Growing data center power demands are driving server end-equipment manufacturers to reach higher power-conversion efficiencies in order to reduce the thermal footprint of their systems. The transition from a 12-V power distribution bus to a 48-V bus creates the need for a high-efficiency, small-footprint step-down converter (48 V to 12 V). Gallium nitride (GaN) field effect transistors (FETs) are the primary enablers for the size reductions and efficiencies needed in these systems.

In Power Tip #122, I provided an overview of a high-efficiency 1kW bus converter design that addresses this need using high-performance GaN switches [1]. That design uses a matrix transformer-based inductor-inductor-capacitor (LLC) converter and an integrated printed circuit board (PCB) transformer.

In this power tip, I want to unpack the custom design of the transformer and explain how I derived it. Specifically, I want to show how to analytically predict the transformer dimensions that will yield the transformer with the smallest footprint and highest converter efficiency, which will require equations for some currents in the system along with estimates of the winding resistances as a function of the geometry, both shared in shared in Power Tip #122. With this data, I’ll explain how to make this prediction using a tool such as Mathcad.

LLC converter power losses

Figure 1 is a high-level schematic for the LLC converter that is the focus of this article. Table 1 lists the corresponding specifications. The integrated matrix transformer that I am going to optimize is shown in gray in Figure 1.

Figure 1 LLC converter with the integrated matrix transformer that will be optimized in this article (shown in gray). Source: Texas Instruments

Table 1 Operating specifications for the bus converter shown in Figure 1.

The mathematical prediction of the minimum size and maximum efficiency will require equations for the losses in the system. These losses need to be parameterized in such a way as to be a function of the transformer geometry. In reality, you’ll need to accommodate losses from many different sources; however, in an effort to make this article digestible, I’m only going to cover four loss elements. Table 2 lists the loss parameters of these elements, along with a description of each.

Parameter	Formula	Description
Pcore		Transformer core loss. k, α, and β are material constants from the material data sheet. Ve is the volume of the core material and is a function of the core geometry dimensions.
Pcu		Transformer winding loss. Ilr,rms and Isec,rms are provided in Power Tip #122 along with the AC resistance term.
Pfet,pri		Primary and secondary GaN FET losses. Since the system is zero voltage switched, only the Rds,on-related losses are required. The currents can be derived as described in Power Tip #122 and are listed as (1) and (2) below.
Pfet,sec

Table 2 LLC loss parameters and a description of each.

The total system losses can then be defined as P_total(w,r) = P_core(w,r)+ P_cu(w,r)+P_fet,pri+P_fet,sec. The P_core and P_cu parameters are shown as explicit functions of the transformer winding geometry. The parameters w and r are placeholders at the moment and will be substituted for the relevant geometric parameters.

Figure 2 shows a mockup of the board and core. The light purple region signifies the total PCB size. The green area is the area taken up by the transformer windings, and the gray material is the gapped transformer core.

Figure 2 Board model the light purple region is the total PCB size, green is the area taken up by the transformer windings, and dark gray is the gapped transformer core. Source: Texas Instruments

Figure 3 shows the most significant geometric parameters for the transformer windings. This drawing is a top view of one copper layer of the green region shown in Figure 2. For simplicity, Figure 3 does not show any vias or layer cuts, although these will be necessary for implementation.

Figure 3 The most significant transformer winding geometry. A top view of the green region shown in Figure 2. Source: Texas Instruments

The parameter r_c is the radius of the transformer core post. And r_c,s is the spacing between the core and the PCB windings. w_cu,1 and w_cu,2 are the distance from the PCB hole to the outer edge of the winding. Using these parameters allows you to define the total loss as a function of these parameters as P_total(w_cu,2,r_c). Using Figure 3, you can also define the area of the transformer footprint as a function of these same parameters as shown in equation (3).

Optimization

You can use P_total(w_cu,2,r_c) and A_xfmr(w_cu,2,r_c) to optimize the system for minimum power loss and minimum size by creating a contour plot of the efficiency equation (4), and then superimposing on that plot another contour plot design with a constant footprint area. See Figure 4.

Figure 4 Optimal transformer dimensions plot with a contour plot of the efficiency equation (4) and another contour plot with a constant footprint area superimposed on it. Source: Texas Instruments

In Figure 4, the curved lines represent contours of constant efficiency, while the straight lines sloping downward from left to right represent designs of constant area. Take note of the fact that the smaller footprint designs are the ones furthest to the left in the plot. In addition, the point where a constant efficiency contour just barely touches one of these lines is the point where the design results in the smallest footprint for that efficiency contour. Based on this, you can visualize a line of small transformers, as shown by the dark blue line. Any design on this line will be the smallest design possible for the target efficiency—or, if you prefer, the highest efficiency that you can achieve for a design of that size. The red dot in Figure 4 shows the final design dimensions chosen for the hardware.

It is easy to generate contour plots such as those in Figure 4 in tools including Matlab, Mathcad, or Mathematica. This type of analysis is what happens when you solve a constrained optimization problem using Lagrange multipliers [4] and can be carried out with Equations 5, 6 and 7. While solving the problem this way is more mathematically intensive, the end result is identical to what you can achieve by using the contour plots.

Comparing the loss in the transformer (as produced by the equations) to the transformer loss (produced by an independent simulation of the transformer using finite element analysis, or FEA) will validate this method. The results of the two models are within 1% of each other. Furthermore, the total losses in the system compared to the prediction also have excellent correlation, as shown in Figure 5.

Figure 5 Loss comparison where the total losses in the system compared to the prediction also have excellent correlation. Source: Texas Instruments

Transformer size optimization

In this power tip, I presented a method for solving a constrained optimization problem that results in the transformer parameter necessary to achieve the smallest-size transformer and highest efficiency converter. The accuracy of the method was within 1%, as demonstrated by FEA simulation. This method does not need the complex derivatives to formally solve a Lagrange multiplier problem, allowing you to precisely zero in on better solutions and further leverage the size and efficiency benefits of GaN switches.

Brent McDonald works as a system engineer for the Texas Instruments Power Supply Design Services team, where he creates reference designs for a variety of high-power applications. Brent received a bachelor’s degree in electrical engineering from the University of Wisconsin-Milwaukee, and a master’s degree, also in electrical engineering, from the University of Colorado Boulder.

Related Content

• Power Tips #122: Overview of a planar transformer used in a 1-kW high-density LLC power module
• Power Tips #117: Measure your LLC resonant tank before testing at full operating conditions
• Power Tips #84: Think outside the LLC series resonant converter box
• Power Tips #92: High-frequency resonant converter design considerations, Part 2

References

1. Texas Instruments. n.d. 100-V 4.4-mΩ half-bridge GaN FET with integrated driver and protection. Accessed July 23, 2024.
2. Liu, Ya. 2007. “High Efficiency Optimization of LLC Resonant Converter for Wide Load Range.” Master’s thesis, Virginia Polytechnic Institute and State University.
3. Dowell, P.L. “Effects of Eddy Currents in Transformer Windings.” Published in Proceedings IEE (UK) 113, no. 8 (August 1966): pp. 1387-1394.
4. n.d. Lagrange multiplier. Accessed July 23, 2024.

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