Polyn delivers silicon-implementation of its NASP chip

Polyn Technology Ltd. announces the successful manufacturing and testing of its first silicon-implementation of its neuromorphic analog signal processing (NASP)Continue Reading The post Polyn delivers silicon-implementation of its NASP chip appeared first on EDN.

Polyn delivers silicon-implementation of its NASP chip
Polyn's neuromorphic analog signal processing (NASP) VAD chip.

Polyn Technology Ltd. announces the successful manufacturing and testing of its first silicon-implementation of its neuromorphic analog signal processing (NASP) technology. It includes the validation of both the NASP technology and design tools, which automatically convert trained digital neural network models into ultra-low-power analog neuromorphic cores ready for manufacturing in standard CMOS processes. The first product chip features an analog neuromorphic core of a voice activity detection (VAD) neural network model.

Polyn's neuromorphic analog signal processing (NASP) VAD chip.
(Source: Polyn Technology Ltd.)

This platform uses trained neural networks in the analog domain to perform AI inference with much lower power consumption than conventional digital neural processors, according to the company. Application-specific NASP chips can be designed for a range of edge AI applications, including audio, vibration, wearable, robotics, industrial, and automotive sensing.

This is the first time that Polyn generated an asynchronous, fully analog neural-network core implementation in silicon directly from a digital model. This opens up a “new design paradigm— neural computation in the analog domain, with digital-class accuracy and microwatt-level energy use,” said Aleksandr Timofeev, Polyn’s CEO and founder, in a statement.

Targeting always-on edge devices, the NASP chips with AI cores process sensor signals in their native analog form in microseconds, using microwatt-level power, which eliminates all overhead associated with digital operations, Polyn explained.


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The first neuromorphic analog processor contains a VAD core for real-time voice activity detection and offers fully asynchronous operation. Key specs of this NASP VAD chip include ultra-low-power consumption of about 34 µW during continuous operation and ultra-low latency at 50 microseconds per inference.

In addition to the VAD core, Polyn plans to develop other cores for speaker recognition and voice extraction, targeting home appliances, communications headsets, and other voice-controlled devices.

In April 2022, the company announced its first NASP test chip, implemented in 55-nm CMOS technology, demonstrating the technology’s brain-mimicking architecture. This was followed in October 2022 with the introduction of the NeuroVoice tiny AI chip, delivering on-chip voice extraction from any noisy background. In 2023, Polyn introduced VibroSense, a Tiny AI chip solution for vibration monitoring sensor nodes. (Polyn was ranked as an EE Times Silicon 100 company to watch in 2025.)

Customers who are developing products with ultra-low-power voice control can apply online for the NASP VAD chip evaluation kit. Polyn will demonstrate its first NASP chips, available for ordering, at CES 2026 in Las Vegas, Nevada, January 6-9, in Hall G, Booth #61701. A limited selection will be showcased at CES Unveiled Europe in Amsterdam, October 28, Booth HB143.

The post Polyn delivers silicon-implementation of its NASP chip appeared first on EDN.

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