Inter-die gapfill tool claims advanced packaging breakthrough

A new inter-die gapfill tool is purpose-built to solve critical challenges in 3D stacking and high-density heterogeneous integration. VECTOR TEOS 3D provides ultra-thick, uniform inter-die gapfill by leveraging Lam Research’s proprietary bowed wafer handling approach and advancements in dielectric deposition.

Industry watchers describe it as a significant step for advanced packaging, as void-free, nanoscale gapfill could be crucial for reliable 3D stacking and chiplet integration in next-generation artificial intelligence (AI) and high-performance computing (HPC) semiconductor devices.

The semiconductor industry is turning to 3D advanced packaging to integrate multiple dies into chiplet architectures for AI, HPC, and gaming applications. These chiplet designs enhance processing speed and pack more compute into smaller form factors by bringing memory and processing closer, thereby optimizing electrical pathways.

However, as these chipsets scale taller and become more complex, they encounter a range of new manufacturing challenges. That spans from stress during processing—which can distort or bow a wafer’s shape—to cracks and voids in films that cause defects and lower yield. In other words, when chip designers scale devices vertically and horizontally, they require a dielectric gapfill that is thick enough to fill the spaces between stacked dies for structural, thermal, and mechanical integrity.

It’s interesting to note that progress in modern chips is traditionally measured by development of thinner and smaller structures. On the other hand, advanced packaging strays from this convention, seeking ways to make films thicker as they stack dies higher and higher. Here, thick wafers and their associated glass substrates respond differently to thermal cycles, contributing to bowing. And handling bowed wafers is notoriously difficult.

Inter-die gapfill tool

Enter VECTOR TEOS 3D (pronounced “TEE-oss”), Lam Research’s deposition tool specifically designed for advanced packaging to reliably deliver ultra-thick films—dielectric gapfill films up to 60-µm in thickness—and thus excel at processing thick wafers with high bowing characteristics. TEOS minimizes cracks and voids in thick dielectric gapfill films while handling high-bow wafers.

Figure 1 TEOS 3D provides high-quality, void-free thick dielectric film deposition for advanced packaging. Source: Lam Research

Film cracks and voids can damage finished dies, each worth tens of thousands of dollars. “VECTOR TEOS 3D deposits the industry’s thickest, void-free, inter-die gapfill films, customized to meet the challenging requirements of advanced die stacking integration schemes, even on ultra-stressed, high-bow wafers,” said Sesha Varadarajan, senior VP of the Global Products Group at Lam Research.

TEOS deposits specialized dielectric films of up to 60 microns thick between dies with nanoscale precision, though it provides scalability to deposit films greater than 100 microns. These films provide essential structural, thermal and mechanical support to prevent common packaging failures such as delamination.

Next, TEOS features Lam’s novel clamping technology and an optimal pedestal design, offering exceptional stability when processing thick wafers. That, in turn, facilitates uniform film deposition even when dealing with extreme wafer bow.

Finally, Lam’s quad station module (QSM) architecture features four distinct stations, enabling parallel processing and reducing bottlenecks. It leads to nearly 70% faster tool throughput compared to Lam’s previous generation of gapfill solutions. Moreover, the high throughput resulting from the modular design helps improve the cost of ownership up to 20%.

Figure 2 TEOS addresses a range of advanced packaging challenges. Source: Lam Research

Other key features of TEOS include a large chamber design, ringless wafer transfer, and integrated equipment intelligence.

Why it matters

Advanced packaging is now an essential part in the development of next-generation chips such as GPUs and HBM memory chips. The GPU/HBM stacks are growing more complex while packing in more transistors. Therefore, traditional solutions are increasingly falling short.

Advanced packaging requires extreme precision at every step of the chipmaking process, spanning from plating to etch. Lam claims that TEOS is the first solution for single-pass processing of crack-free films exceeding 30 microns in thickness. That significantly enhances yield and process time.

TEOS is now installed at leading logic and memory fabs around the world.

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